1. Field of the Invention
The present invention relates to a semiconductor device and the process for the same, in particular, to a dual gate type CMOS (complementary metal oxide semiconductor) device which has a gate including an n type silicon part doped with a large amount of phosphorous (P) and a p type silicon part doped with boron (B) as well as the process for the same.
2. Description of the Background Art
As for a gate electrode material of dual gate type CMOS devices, a polycide gate utilizing an n type polysilicon doped with a large amount of phosphorous (P) and a polycide gate utilizing a p type polysilicon doped with boron (B) are conventionally utilized. Then, the conductive type of the gate electrode of the nMOS transistor is n+ type while the conductive type of the gate electrode of the pMOS transistor is p+ type and the channel profiles of the nMOS transistor and the pMOS transistor are both surface type.
FIG. 32 shows an example of the structure of a conventional dual gate type CMOS device. As shown in FIG. 32, an n well 2 and a p well 3 are formed in a silicon substrate 1, a pMOS transistor is formed on the n well 2 and an nMOS transistor is formed on the p well 3.
An isolation insulating film 4 is selectively formed on the main surface of the silicon substrate 1 and a gate electrode 8 is formed so as to extend from the isolation insulating film 4 to the active regions. The gate electrode 8 is formed on the main surface of the silicon substrate 1 via a gate insulating film 5 and is formed of a polysilicon film 6 and a tungsten silicide film 7. An insulating film 9 is formed on the gate electrode 8 and a sidewall insulating film 10 is formed on the sidewalls of the gate electrode 8.
An interlayer insulating film which is not shown is formed so as to cover the insulating film 9 and the sidewall insulating film 10 and a wire which is not shown is formed on that interlayer insulating film so that the above wire and the gate electrode 8 are connected via a contact hole.
Since p type impurities such as boron (B) and n type impurities (dopant) such as phosphorous (P) are injected in the above gate electrode 8 as shown in FIG. 32, these impurities diffuse, mutually, through heat treatment at a high temperature (for example, 800xc2x0 C. or more) after the formation of the gate electrode 8.
This phenomenon, significantly, occurs in the polycide gate structure as shown in FIG. 32 rather than in the polysilicon gate. This is because the diffusion phenomenon is considered to accelerate when a metal silicide film becomes a path mainly for impurities since the diffusion rate of the impurities in a metal silicide film is substantially larger than that in a polysilicon film.
In this manner, the impurities mutually diffuse within the gate electrode 8 and, thereby, the impurity concentrations are compensated both in the n+ type region and in the p+ type region of the gate electrode 8 so that the threshold voltage Vth fluctuates and a region, which is not the surface channel, is created.
In order to obviate this problem, there is a method for forming a pMOS transistor and an nMOS transistor separately. When this method is adopted, however, not only extra regions for providing contact holes for respective gates become necessary but also upper part wires corresponding to them if necessary. Therefore, the integrity is lowered.
The present invention is provided to solve the above described problem. The purpose of the present invention is to prevent mutual diffusion of impurities of different conductive types in a gate electrode having a part into which those impurities are introduced without lowering the integrity.
A semiconductor device according to the present invention includes a semiconductor substrate which has a trench in the main surface and a gate electrode which is formed above the main surface via a gate insulating film and which includes a silicon film and a metal-based conductive film. The silicon film has a first part doped with impurities of a first conductive type, a second part doped with impurities of a second conductive type and a connection part which connects the first part and the second part within the trench and a metal-based conductive film located on the connection part is removed. Here, the above silicon film includes a polysilicon film, an amorphous silicon film, and the like. In addition, a metal-based conductive film means a conductive film which includes metal so that the metal-based conductive film includes, for example, a metal film or a silicide film.
By providing a connection part within the trench as described above, the first and the second parts can be connected within the trench. In addition, by removing a metal-based conductive film located on the connection part, the metal-based conductive film can be divided above the connection part. Thereby, impurities can be prevented from mutually diffusing when passing through the metal-based conductive film.
It is preferable that a recess is provided in the above trench reaching to the connection part, penetrating through the metal-based conductive film, and that an insulating film be filled in into this recess. In this manner, an insulating film is filled in between the metal-based conductive film and, thereby, the mutual diffusion of the impurities in the gate electrode can be effectively prevented.
In addition, the trench is formed in an element isolation region and the above connection part is formed on the surface with in the trench via a base insulating film wherein the thickness of the base insulating film is larger than the thickness of the gate insulating film.
By making the thickness of the base insulating film larger than the thickness of the gate insulating film in this manner, a leak current can be prevented in the element isolation region.
The minimum width of the aperture part of the trench surrounded by the above base insulating film is two times, or less, as large as the thickness of the silicon film. Thereby, the aperture part of the trench can be filled with the silicon film and the unevenness in the silicon film surface above the trench can be reduced.
A process for a semiconductor device according to the present invention includes, in one aspect, the following respective steps. A trench isolation region is formed in the main surface of a semiconductor substrate. On the main surface, a silicon film, which has a first part doped with impurities of a first conductive type and a second part doped with impurities of a second conductive type, a metal-based conductive film and a first insulating film are formed. By patterning the first insulating film, the metal-based conductive film and the silicon film, a gate electrode is formed. A second insulating film is formed so as to cover the first insulating film. A first mask film is formed on the second insulating film. The second insulating film is etched by using the first mask film so as to form a first sidewall insulating film on the sidewalls of the gate electrode and so as to selectively expose the surface of the first insulating film. A second mask film is formed on the surface of the first insulating film so as to expose a part of the surface of the first insulating film located above the trench isolation region and the second insulating film. The second insulating film is etched by using the second mask film so as to form a second sidewall insulating film on the sidewalls of the gate electrode and the first insulating film located above the trench isolation region and the metal-based conductive film are etched so as to form a recess which reaches to the silicon film.
Since a part of the surface of the first insulating film located above the trench isolation region is exposed at the time when the second insulating film is etched by using the second mask film, the first insulating film and the metal-based conductive film located beneath can be etched at the time when the second insulating film is etched. Thereby, a recess which reaches to the silicon film can be formed so that the metal-based conductive film can be divided above the trench isolation region.
It is preferable that the step of forming a pair of first impurity regions (high concentration impurity regions) which become the source and drain of the first MOS transistor by injecting impurities of the first conductive type into the main surface of the semiconductor substrate by using, as a mask, the above first mask film, the first sidewall insulating film and the first part of the gate electrode as well as the step of forming a pair of second impurity regions (high concentration impurity regions) which become the source and drain of the second MOS transistor by injecting impurities of the second conductive type into the main surface of the semiconductor substrate by using, as a mask, the second mask film, the second sidewall insulating film and the second part of the gate electrode are provided.
In this manner, the source and drain of each MOS transistor can be formed by injecting predetermined impurities into the main surface of the semiconductor substrate by using the above described first and second mask films, and the like, and therefore, it is not necessary to add a new mask for the formation of a recess according to the present invention.
A process for a semiconductor device according to another aspect of the invention includes the following respective steps. A trench for element isolation is formed in the main surface of a semiconductor substrate. A base insulating film is formed on the surface within the trench. A silicon film which has a first part doped with impurities of the first conductive type and a second part doped with impurities of the second conductive type is formed on the main surface and a connection part between the first and second parts in the silicon film is formed on the base insulating film within the trench. A metal-based conductive film and an insulating film are formed on the silicon film. A mask film, which has an aperture above the trench, is formed on the insulating film. By patterning the insulating film, the metal-based conductive film and the silicon film using the mask film, a gate electrode is formed and a recess is formed so as to reach to the connection part above the trench.
Since a connection part is formed within the trench as described above, the thickness of that connection part can be made larger than that of the silicon film 6 located on the main surface as shown in, for example, FIG. 29. Thereby, at the time when the insulating film, the metal-based conductive film and the silicon film are patterned, the etching can be stopped at the above connection part so that the metal-based conductive film can be divided above the connection part.
The step of forming the above base insulating film includes the step of forming a buried insulating film which is filled in into the trench, the step of forming a first aperture part which penetrates through the buried insulating film so as to reach to the bottom surface of the trench and the step of forming a bottom part insulating film which covers the bottom surface of the trench which has been exposed so as to form a second aperture part above the trench.
Thereby, the second aperture part can be formed in the base insulating film so that the above described connection part can be formed within the trench by filling in this second aperture part with a silicon film.
The foregoing and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.